BUT11AF DATASHEET PDF

BUT11AF DATASHEET PDF

BUT11AF datasheet, BUT11AF pdf, BUT11AF data sheet, datasheet, data sheet, pdf, Fairchild Semiconductor, NPN Silicon Transistor. BUT11AF. GENERAL DESCRIPTION. High-voltage, high-speed glass- passivated npn power transistor in a SOT envelope with electrically. BUT11AF NPN Silicon Transistor. Absolute Maximum Ratings TC=25°C unless otherwise noted. Symbol VCBO Parameter Collector-Base Voltage: BUT11AF.

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No liability will be accepted by the publisher for any consequence of its use. Region of permissible DC operation. Product specification This data sheet contains final product specifications.

August 4 Ptot max and Ptot peak max lines. August 8 Rev 1. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice.

BUT11AF Datasheet(PDF) – Savantic, Inc.

Reverse bias safe operating area. Typical base-emitter saturation voltage. Philips customers using datasheet selling these products for use datasneet such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. August 7 Rev 1. August 2 Rev 1. Switching times waveforms with inductive load. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.

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Oscilloscope display for VCEOsust.

Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. Stress above one or more of the limiting values may cause permanent damage to the device. Observe the general handling precautions for electrostatic-discharge sensitive devices ESDs to prevent damage to MOS gate oxide. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied.

Forward bias safe operating area. Test circuit inductive load. Switching times waveforms with resistive load. Test circuit for VCEOsust. Test circuit resistive load.

Typical DC current gain. Extension for repetitive pulse operation.

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SOT; The seating plane is electrically isolated from all terminals. Exposure to limiting values for extended periods may affect device reliability.

Normalised power derating and second breakdown curves. Application information Where application information is given, it is advisory and does not form part of the specification. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.

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Refer to mounting instructions for F-pack envelopes. Typical base-emitter and collector-emitter saturation voltages. UNIT – – 1.